Nanoprocessor Design
A tiny 4-bit processor I designed from scratch in VHDL, the same kind of building blocks (ALU, registers, instruction decoding) a real CPU has, then tested it and ran it on an actual FPGA board.
The problem
Understanding how a processor actually executes instructions, fetch, decode, execute, at the hardware level, means building one from logic gates up rather than just programming against an existing instruction set.
The approach
Designed a 4-bit nanoprocessor in VHDL with an ALU, register bank, program counter, instruction decoder, and program ROM, then extended the base instruction set with arithmetic, branching, and comparison operations. Verified the design with VHDL testbenches before deploying it on a Basys 3 FPGA, wired to LED and seven-segment display output so the processor's internal state was actually observable on hardware.
What I learned
Simulation and hardware surface different classes of bugs: a design that passes its testbenches in xsim still has to be re-checked against real timing and I/O constraints once it's driving physical LEDs and a seven-segment display on the FPGA.